Abstract

In this paper the writers have developed a model and an optimization technique for the design of hierarchical structures of memory so as to minimize the average access time to blocks of information stored in the hierarchy for a given cost constraint. The assumption is made that the “activity profile” giving the relative frequencies with which blocks are accessed (for a given set of problems) is available. The designs are tailored to fit the given activity profiles. The first part of the paper introduces the basic problem solved and some terminology used in the development of the theory. The second part consists of: (a) A method of evaluating memory types, i.e., a method of selecting an optimum subset of memory types which will compose the hierarchy from the set of all available memory types, and (b) The determination of the optimum sizes of each memory type in the subset so as to minimize the average access time to addresses in the hierarchy for a given cost constraint and a given activity profile. (c) The third part develops the optimization technique when the number of members in the memory hierarchy is limited. The last part is a discussion on the possible application of the technique to the evaluation of multi-precision arithmetic and to language translation. The second part also considers the problem of deriving the cost-average-access-time characteristic for a given profile. This characteristic will be useful in memory allocation problems as well as a valuable tool to computer designers for determination of memory sizes.

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