Optimization of high-k and gate metal workfunction for improved analog and intermodulation performance of Gate Stack (GS)-GEWE-SiNW MOSFET

Abstract

This work optimizes the gate engineering scheme (both gate stack and gate metal workfunction engineering) of Stacked Gate (SG) Gate Electrode Workfunction Engineered (GEWE)-Silicon Nanowire MOSFET at 300 K for improved analog and intermodulation performance. This has been done by evaluating and analyzing the metrics such as Switching Ratio, Subthreshold Swing (SS), Device Efficiency, channel and output resistance, VIP3, IIP3, 1-dB Compression Point, IMD3, HD2 and HD3. Simulation results exhibit that HfO2 as a gate stack exhibit high linearity at a comparatively low gate bias of 0.56 V with higher IIP3 (6.21 dBm) and low IMD3 (9.6 dBm). Further, the characteristics/performance is modulated by adjusting the workfunction difference of metal gate. This study demonstrates that SiNW MOSFET modeled with HfO2 as a gate stack over SiO2 interfacial layer, and gate metal workfunction difference (ΔW) of 4.4 eV can be considered as a promising potential for low power switching component in ICs and Linear RF amplifiers.