Abstract

This paper reports significant improvements in the electrical performance of In0.53Ga0.47As metal-oxide-semiconductor field-effect transistors (MOSFET) by a post-gate CF4/O2 plasma treatment. The optimum condition of CF4/O2 plasma treatment has been systematically studied and found to be 30 W for 3–5 min. Approximately 5× reduction in interface trap density from 2.8 × 1012 to 4.9 × 1011 cm−2eV−1 has been demonstrated with fluorine (F) incorporation. Subthreshold swing has been improved from 127 to 109 mV/dec. Effective channel mobility has been enhanced from 826 to 1,144 cm2/Vs.

Highlights

  • In0.53Ga0.47As based-III-V compounds have attracted a great deal of attention for their advantages in high electron mobility over their Si-based counterparts

  • In0.53Ga0.47As and high dielectric constant gate dielectrics has imposed an enormous challenge for implementing inversion-type enhancement mode metal-oxide-semiconductor field-effect transistors (MOSFETs)

  • We systematically studied the effects of CF4/O2 plasma power wattage and treatment time on HfO2/In0.53Ga0.47As gate stack

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Summary

Introduction

In0.53Ga0.47As based-III-V compounds have attracted a great deal of attention for their advantages in high electron mobility over their Si-based counterparts. Proper surface pre-treatment and insertion of interface passivation layer [1,2,3] have generally employed to achieve improved interface quality Those approaches usually performed prior to high-k deposition, interface state traps created during the high-k deposition need to be passivated by a post-oxide treatment. Previous reports showed that the insertion of a thin interface passivation layer could improve interface quality [10], those layers usually have relative lower k value [11]. This may hinder equivalent oxide thickness (EOT) scaling and as a result, hardly meet the requirement for the sub 22 nm nodes. Fluorinated samples exhibit low interface trap density (Dit) of 4.9 × 1011 cm−2eV−1, which is the lowest value compared to prior reported HfO2/In0.53Ga0.47As gate stacks

Experimental Section
Results and Discussion
Electrical Characterization of the Interface Trap Density
Conclusions

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