Optimization of CMOS Analog Circuits Using Grey Wolf Optimization Algorithm

Abstract

A metaheuristic search algorithm named Grey Wolf Optimization (GWO) is presented in this paper to optimally design most commonly used yet important analog circuits i.e., Complementary metal-oxide semiconductor (CMOS) differential amplifier circuit and two-stage CMOS operational amplifier circuit. The GWO algorithm is the basic impersonation of the hunting mechanism and leadership hierarchy observed in grey wolves' natural behavior. Searching for, encircling and attacking prey are the three main steps of hunting, which are implemented in this algorithm. The sizes of transistors are optimized using GWO to improve the design specifications of the circuit by reducing the area occupied by the transistors. The simulation results and convergence plots demonstrate the superiority of GWO over some of the other algorithms such as Particle Swarm Optimization (PSO), a hybrid of Gravitational Search Algorithm (GSA) and PSO (GSAPSO), for analog circuit design.