Abstract
Instruction selection is a key component of code generation. High-quality instruction selection has a great impact on the size and quality of the generated code. The existing instruction selection technology is mostly limited to a single statement or a single basic block, and the global instruction selection based on LLVM degrades the entire function in the form of SSA. Global instruction selection optimization based on LLVM is implemented on Shenwei platform, including global instruction merge optimization based on cost model, register bank selection optimization and instruction locality optimization. Through the test of SPEC CPU2006, Experimental results show that the average speed-up ratio before and after the optimization of global instruction selection based on LLVM is 1.08, and the maximum speed-up ratio is 1.36. In addition, when the quality of the generated code is equivalent, the global instruction selection is compared with the default instruction selection, the LLC compilation speed is increased by an average of 20%, and the entire compilation cycle is increased by an average of 6%-8%.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
