Abstract
For functional safety, the scheduler should perform all time critical tasks in an order and within predefined deadlines in embedded systems. Scheduling of time critical tasks is determined by estimating their worst-case execution times. To justify the model design of task scheduling, it is required to simulate and visualise the task execution and scheduling maps. This helps to figure out possible problems before deploying the schedule model to real hardware. The simulation tools which are used by companies in an industry perform scheduling simulation and visualisation of all time critical tasks to design and verify the model. All of them lack the capability of comparing simulation results versus real results to achieve the optimised scheduling design. This sometimes leads the overestimated worst-case execution times and increased system cost. The aim of our study is to decrease the system cost with optimisation of scheduled tasks via using the static analysing method.
 
 Keywords: Schedule visualisation, scheduler optimisation, functional safety, real-time systems, scheduler.
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