Optimisation of isolation for 0.5 μm CMOS technology using SILO process with R.T.N. of silicon

Abstract

A complete process for field isolation, applicable to a 0.5 μm CMOS technology, has been developed using SILO process with Rapid Thermal Nitridation of Silicon (R.T.N.). Adequate isolation was achieved for 0.9 μm active area spacing and n+ to p+ distance of 2.0 μm with conventional diffused twin wells. Three p+ field doping processes were compared in terms of narrow width effect and reliability.