Abstract

The embedded memories of ultra-low power processors require periodic refreshing, which blocks the CPU-memory access and degrades performance. In addition, refreshing queues cause a drop in system performance not only when they are saturated but also when they are empty. We present an optimal queuing-based opportunistic refreshing algorithm that eliminates performance loss. We analyze system performance dependence on queue capacity and memory size to derive a closed-form performance expression that provides clear guidelines for memory design implementation. Comparison of a hardware implementation in a RISC-V ultra-low power processor to ordinary periodic refreshing demonstrates the algorithm can provide a considerable performance speedup in a wide variety of real applications.

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