Optimal pulsewidth modulation of medium-voltage modular multilevel converter

Abstract

Modular multilevel converter (MMC) is now the state-of-the-art converter topology for high power applications. MMC topology has been commercially introduced in high-voltage dc transmission (HVDC) converter systems as well as medium-voltage (MV) industrial AC drives. To limit overall device losses in high power applications, the device switching frequency of power semiconductor devices should be limited to few hundred Hertz. However, there exist trade-off between device switching frequency and harmonic distortion of converter output currents. An emerging technique for low device switching frequency operation of high power converters without compromising on quality of output currents is synchronous optimal pulsewidth modulation (SOP). The SOP technique has been demonstrated successfully for classical multilevel topologies and it has been proved that maximum device switching frequency can be limited to rated fundamental frequency for seven or higher-level inverters without compromising quality of output currents. However, implementation of SOP technique for MMC topology is still pending. Main challenge for control of MMC is to maintain floating capacitor voltages around their nominal value, which conduct fundamental frequency component of load current. The goal of our study is to propose SOP technique for MMC to achieve low device switching frequency operation, better quality of converter output currents and maintain capacitor voltages around their nominal value. The simulation results from MMC topology illustrate the performance of proposed SOP technique.