Optimal FPGA implementation of GAMLP systems

Abstract

An interesting approach to assure the real-time property of neural automatic target recognition systems is to use an efficient hardware implementation of the neural networks used inside of their classification chains. Consequently, a proper genetic procedure used to optimize both connectivity and distribution of the neural weights of MLP neural networks (GAMLP system) is presented. Finally, having as starting point the previous broached aspects, an optimal FPGA hardware implementation of MLP neural networks is also described.