Optimal design of complementary metal-oxide-semiconductor analogue circuits: An evolutionary approach

Abstract

This article proposes an efficient approach to design two different CMOS analogue circuits, namely p-channel Metal-Oxide-Semiconductor (PMOS) driver-based two-stage comparator and n-channel Metal-Oxide-Semiconductor (NMOS) driver-based folded-cascode operational amplifier, using a modified version of particle swarm optimization (PSO) known as craziness-based PSO (CRPSO) algorithm. PSO replicates the behaviour of bird flocking, and it requires a fewer number of control parameters. The drawbacks of PSO are premature convergence and stagnation problem. Due to these drawbacks, the PSO is improved to CRPSO for the optimal design of analogue circuits. The near-global optimal solution has been achieved by using the CRPSO. The CRPSO is used to attain the optimal sizes of the MOS devices for the individual circuits, which lead to the minimization of the total MOS area occupied by the circuit. SPICE simulation has also been carried out with the optimal device dimensions achieved from the CRPSO algorithm. Statistical analysis and the process corner analysis have also been performed for the above mentioned circuits. SPICE-based results confirm that the CRPSO-based approach is a better technique compared to the other earlier reported methods for both the circuits.