Abstract
All-optical logic gates have attracted considerable attention over the past decade. They have found application as adders, subtractors, header recognizers, parity checkers and in encryption systems. In this paper, we present a new structure based on cascaded 4×4 and 2×2 multimode interference (MMI) couplers for implementing optical XOR, XNOR, NAND and OR logic gates. The emphasis of the design is on optimising bandwidth and fabrication tolerance. Such a design would be useful for optical label swapping and recognition in optical packet switching networks. We use silicon on insulator (SOI) waveguides that are compatible with the CMOS technology, for designing the whole device. The Beam Propagation Method (BPM) and the Eigenmode Expansion Method (EEM) are used for numerical simulations. We show that the contrast ratios for logic 1 and logic 0 for XOR, XNOR, NAND, and OR gates are from 18 dB to 28 dB for a bandwidth of 30nm, respectively. A large fabrication tolerance of ±500 nm can be achieved by using this structure.
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