Optical packet switching by all-optical header recognition using 1.55-μm polarization bistable VCSEL

Abstract

Summary form only given. Many types of all-optical header processing techniques have been investigated to speed up telecommunication networks. High-speed label switching using a multimode interference bistable laser diode has been demonstrated for 1-bit header [1]. We have investigated the all-optical buffer memory which memorizes an arbitrary one bit from optical signal trains using AND gate and memory functionalities of 1.55-μm polarization bistable VCSELs [2]. In this presentation, we report an experiment on an optical packet header processing system using the same functionalities of the polarization bistable VCSELs.The VCSEL with a square mesa structure has two orthogonal polarization lasing modes. The lasing modes can be switched by injection of an optical pulse with the orthogonal polarization and this state is maintained. Thus, all-optical flip-flop operation can be realized. The principle of optical header recognition using a polarization bistable VCSEL is shown in Fig. 1. The data signal and the set pulse are 0° polarization and the reset pulse is 90° polarization. These three signals are injected into the polarization bistable VCSEL. The injection power of both the data signal and the set pulse are set to less than the polarization switching threshold of the VCSEL. When both the data signal and the set pulse are injected simultaneously, the injection power exceeds the polarization switching threshold and the lasing polarization of the VCSEL is switched from 90° to 0°. Until the reset pulse is injected, the lasing polarization state of the VCSEL is held at 0°. The VCSEL output light through a polarizer with its polarization axis oriented at 0° is input into the control port of an all-optical switch to switch the output port from the original one to another one. Due to the limitation of our experimental instruments, we used a photodiode and a LiNbO3 switch instead of an all-optical switch. Thus, depending on the state of one bit in the header, 0 or 1, the output of payload is switched between the output port 0 and 1. The experimental results are shown in Fig. 2. The data signals consisted of a header and a payload. The format of the header was RZ 4-bit length of 500-Mb/s. The payloads were NRZ pseudorandom-bit-sequence (PRBS) data signals as long as a 211-1-bit of 40-Gb/s. To recognize the 2nd bit of the headers, the timing of the set pulses was adjusted to the 2nd bit of the headers. In this system, the headers were not extracted from the data signals. Thus the header were also output from one of the output ports. The peak powers of the data pulses, the set pulses, and the reset pulses at the VCSEL input were 0.4 μW, 0.6 μW, and 2.0 μW, respectively. When the 2nd bit of the header was “1,” the VCSEL output light through the 0° polarizer (VCSEL output (0°)) was observed. Therefore, when the headers were “1101” and “1111,” the payloads were output from port 1. On the contrary, when the headers were “1011” and “1001”, the payloads were output from port 0. We demonstrated a novel optical header processing system that switches 40-Gb/s NRZ payloads to a designated port depending on the state of one bit in the 4-bit header with 500-Mb/s RZ format using a 1.55-μm polarization bistable VCSEL.