Abstract
Both theoretical and experimental investigations of three-phase C.C D.'s have been carried out. The results of these investigations show that when these devices are driven by two-level clock pulses with linear edges backwards flow loss is an important loss mechanism. The exact value of the transfer inefficiency is strongly influenced by the clock voltage turn-off time with longer turn-off times giving, in general, lower inefficiencies. It has also been shown that the transfer inefficiency is a function of the charge-packet size and that for a given turn-off time the transfer inefficiency is independent of frequency over a wide range of clock frequencies.
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