Abstract
In this article, the UXE-Type inverter is considered for eleven-level operation. This topology exhibits a boosting capability along with reduced switches and one source. An algorithm that utilizes the redundant states to control the voltage-balance of the auxiliary direct current (DC)-link is presented. The proposed control algorithm is capable of maintaining the voltages of each capacitor at Vdc/4 resulting in a successful multilevel operation for all values of load. The inverter is also compared with 11-level inverters. The modulation of the inverter is performed by employing nearest level control and ant colony optimization based selective harmonic elimination. The maximum inverter efficiency is 98.1% and its performance is validated on an hardware-in-the-loop platform.
Highlights
Its detailed circuit analysis consisting of a single direct current (DC)-source with 12 semiconductor switches was presented
The UXE-11 inverter’s comparison with recent eleven level topologies showed that the topology has a low cost factor
The algorithm using the redundant states was defined to balance the voltage across the DC-link around Vdc /2 under permissible ripple
Summary
Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations. This work presents a new UXE-type inverter that can produce 11-levels in its output voltage It uses one DC-source, 12 IGBTs and two capacitors. The operation of the presented inverter is considered under two low switching frequency schemes: (a) A modified NLC (MNLC) scheme, where both the zero states of the converter are utilized will be developed and implemented; and (b) Ant colony optimization (ACO)-based SHE scheme to remove the low-order odd-harmonics from the voltage. The ACO algorithm is utilized to generate the optimum angles of operation over a wide range of modulation indexes by solving the transcendental equations This technique utilizes the distinctive feature of ant’s food searching through shortest route [32], and has been utilized to solve the SHE equations for 3-level active neutral point clamped inverter in [33]. The paper is concluded with the result validation in hardware in the loop environment
Sign-in/Register to view highlights & summary Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
