Operation, analysis, and implementation of a reduced device count asymmetrical multilevel inverter

Abstract

AbstractAn asymmetrically structured multilevel inverter (MLI) having reduced device count feature is discussed in this paper. The proposed converter can successfully produce 21 levels in its output voltage waveform. The basic module of the proposed MLI has 10 unidirectional and 2 bidirectional switches along with 4 dc sources. However, the possibility of the extension in the basic structure has also been discussed with the aim to increase the number of levels. The analysis includes the simulation performed for different conditions and the thermal modeling of the circuit, using PLECS software, for finding the power losses. For generating the switching signals, nearest level control (NLC) has been used as the pulse width modulation method. With the help of a laboratory prototype, the experimental implementation of the proposed topology has been done and the various outcomes conform the simulation results. All the simulations and the experimental results have been presented and explained in the work. The harmonic analysis shows that the total harmonic distortion (THD) in the output voltage is 3.5%.