Open Architecture Solution for Hardware-in-the-Loop Testing

Abstract

Hardware-in-the-loop (HIL) testing has become an essential verification step in the development of vehicle electronics and software systems. New system concepts continue to drive the requirements for HIL systems. The use of an open architecture for HIL testing provides many benefits to meet these requirements quickly and cost effectively. In this paper we will discuss the development of an open architecture HIL system for a J1939 bandwidth study. We will show how this HIL system was used to test and validate that a heavily loaded networks can operate without compromising the performance of safety critical systems