On-line testing of scalable signal processing architectures using a software test method

Abstract

This paper presents a unified approach which allows efficient concurrent tests to be considered when synthesizing scalable signal processing multiprocessor architectures. The approach is based on two earlier works. The first work has allowed the synthesis of scalable multiprocessor architectures where comparison testing is considered. The second work has shown the feasibility of using a software technique called mutation testing to successfully test hardware devices. The presented approach ensures that VLSI digital signal processors (DSP) are totally tested concurrently within useful computation. Based on realistic examples of signal processing applications and state-of-the-art DSPs, the approach is shown to be highly efficient in terms of fault coverage and fault latency.