Abstract

The requirements for placing modules in an automatic run-time reconfigurable (RTR) system differ from those of ASIC and other static environments. The most notable difference is the continual addition and removal of modules from the FPGAs. We examine the effectiveness of a collection of two-dimensional placement decision algorithms in a RTR environment. New algorithms are proposed in addition to several which have been adapted from their one-dimensional counterparts. All of the algorithms have been tested on a set of benchmark applications. Six programs used for testing include examples from encryption, image processing and matrix manipulations, as well as arithemetic, assignment, and looping benchmarks. These applications are multiplexed and simulated to run on our RTR system. A simple last-accessed removal scheme with no compaction is currently implemented. The merit of each algorithm is determined by a set of factors that include fragmentation, chip utilization, decision time, and program run-time benefit.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call