Abstract

The VLSI-related problem of embedding graphs in books is studied. A book embedding of a graph $G = ( V,E )$ consists of two parts, namely, (1) an ordering of V along the spine of the book, and (2) an assignment of each $e \in E$ to a page of the book, so that edges assigned to the same page do not intersect. In devising an embedding, one seeks to minimize the number of pages used. This paper addresses a generalization of the book embedding problem, called the black/white (b/w) book embedding problem, where a vertex-neighborhood constraint is imposed on the ordering of the vertices. A b/w graph is a pair $( G, U )$, where $G = ( V,E )$ is a graph and $U \subseteq V$ is a set of distinguished black vertices (the vertices in $V - U$ are called white). A b/w book embedding of $( G,U )$ is a book embedding of G, where the black vertices are arranged consecutively along the spine. Given a b/w graph $( G, U )$, the b/w book embedding problem is that of finding a b/w book embedding of $( G,U )$, such that the number of pages is minimized. The need for b/w embeddings may arise, for example, in applications where the input ports of a VLSI chip are to be separated from the output ports. The main result of this paper is a characterization of the b/w graphs that admit a one-page b/w embedding. The characterization is given in terms of a set of forbidden b/w subgraphs, the absence of which is necessary and sufficient for one-page b/w embedding. For a b/w graph with none of these forbidden subgraphs, a one-page b/w embedding is constructible in linear time. The construction utilizes a technique called b/w unfolding, which is a feature of independent interest.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call