One-dimensional filtering based two-bit transform and its efficient hardware architecture for fast motion estimation

Abstract

Video encoding is one of the most emerging application in many consumer electronics devices such as smartphones, tablets, cameras and camcorders in order to reduce required memory size for recording and utilized bandwidth for transmission purposes. The processing and battery power required for real-time video encoding is an important challenge for this kind of devices. Thus, efficient video encoding hardware architectures are required. Motion estimation process consumes most of the resources in a typical video encoder. Hence, low-complexity motion estimation approaches with efficient hardware implementations are investigated in the literature. In this paper, a novel low-complexity motion estimation approach based on one-dimensional filtering of input frames to construct two bit-planes for matching is presented. An embedded hardware architecture is also presented in order to demonstrate feasibility of the seamless integration into the state of the art consumer electronics devices. The, binarization stage of filtering based low- complexity motion estimation approaches are implemented in hardware first time in the literature. Experimental results show that the proposed motion estimation method and its hardware architecture provides an efficient alternative to existing low-complexity ME methods.