On-Chip Measurement of Quality Factor Implemented in 0.35μm CMOS

Abstract

Based on time-domain quality factor (Q-factor) measurement principle, we have proposed an architecture which has the potential to be integrated on-chip. Thanks to the proposed original reconfigurable structure, the main measurement error from the offset of the operational transconductance amplifier (OTA) used can be cancelled automatically during the measurement operation, leading to a high accuracy Q-factor measurement. The digital control circuit plays an important role in the automatic passage between the two configurations designed, i.e., peak detector and comparator. The main advantages of the proposed time-domain Q-factor measurement lay on the possibility of being integrated next to the Micro Electro Mechanical System (MEMS) resonator to be measured, the miniaturization of the whole measuring system as well as the enhancement of the measurement performance, and to guide the design of such architecture, a theoretical analysis linking the required accuracy and the given Q-factor to the circuit parameters have been given in this paper. The proposed circuit is designed and simulated in a 0.35[Formula: see text][Formula: see text]m Complementary Metal Oxide Semiconductors (CMOS) technology. The post-layout simulation results show that the operating frequency can reach up to 200[Formula: see text]kHz with an accuracy of 0.4%.