Abstract

Modern microelectrode arrays acquire neural signals from hundreds of neurons in parallel that are subsequently processed for spike sorting. It is important to identify, extract and transmit appropriate features that allow accurate spike sorting while using minimum computational resources. This paper describes a new set of spike sorting features, explicitly framed to be computationally efficient and shown to outperform PCA based spike sorting. A hardware friendly architecture, feasible for implantation, is also presented for detecting neural spikes and extracting features to be transmitted for off chip spike classification.

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