On-chip compression for HDR image sensors

Fadoua Guezzi Messaoud,Antoine Dupret,Yves Blanchard,Arnaud Peizerat

doi:10.1109/dasip.2010.5706262

On-chip compression for HDR image sensors

Fadoua Guezzi Messaoud, Antoine Dupret + Show 2 more

https://doi.org/10.1109/dasip.2010.5706262

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Publication Date: Oct 1, 2010

Citations: 11

Affiliation: CEA LETI, Université Grenoble Alpes, Grenoble Institute of Technology, CEA Grenoble, Atomic Energy and Alternative Energies Commission, UniLaSalle Amiens (ESIEE-Amiens), Laboratoire d'électronique, systèmes de communication et microsystèmes, Université Gustave Eiffel

#High Dynamic Range Image Sensors #High Dynamic Range + Show 8 more

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Abstract

An image compressing technique for High Dynamic Range (HDR) image sensors is introduced. Compression is performed in two steps: Pixel value coding optimization followed by DCT-based (Discrete Cosine Transform) compression. A floating point coding technique is first used with a common exponent shared between pixels of the same block, and then a DCT is applied to each group of pixels. This new concept, while maintaining low complexity architecture, shows a compression ratio of 75 % and retains a good image quality with a PSNR of about 40 dB.

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