On the Way to Zero Defect of Plastic-Encapsulated Electronic Power Devices—Part III: Chip Coating, Passivation, and Design

Abstract

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> Concerning thermomechanically induced failures such as metal-line deformation and passivation cracks, there is a practicable way to achieve the zero-defect limit of plastic-encapsulated power devices. This limit can be reached by, first, evaluating the influence of the major components involved and, consequently, by selecting the appropriate materials and measures, and, second, by always keping in mind the interdependence between all components, i.e., chip and package have to be regarded as an entity. An important finding was that applying simply one improvement step will not necessarily lead to the desired goal. Only the implementation of all improvement steps considering their interdependence is the key for the perfect overall system chip and package. In Part III of this series of papers, the influence of passivation and die coating materials on thermomechanical damage is investigated. Finally, it is shown that an intelligent chip design, in combination with a stiff Al multilayer, a low-stress molding compound (low coefficient of thermal expansion and high Young's modulus), a new passivation material, and an appropriate polyimide layer, may reduce the thermomechanical damage to zero, even for electronic power devices. </para>