Abstract

We propose two reduced-complexity (RC) LDPC decoders, which can be used in combination with large-girth LDPC codes to enable ultra-high-speed serial optical transmission. We show that optimally attenuated RC min-sum sum algorithm performs only 0.46 dB (at BER of 10(-9)) worse than conventional sum-product algorithm, while having lower storage memory requirements and much lower latency. We further study the use of RC LDPC decoding algorithms in multilevel coded modulation with coherent detection and show that with RC decoding algorithms we can achieve the net coding gain larger than 11 dB at BERs below 10(-9).

Highlights

  • In response to high-bandwidth demands due to rapid growth of data-centric applications and deployment of broadband access networks, the network operators are upgrading their dense wavelength division multiplexing (DWDM) networks from 10Gb/s per channel to more spectrally efficient 40 Gb/s and 100 Gb/s [1]

  • In order to achieve ultra-high-speed optical transmission at 400Gb/s and beyond with commercially available equipment operating at 40 Giga symbols/s (40 GS/s), we have recently proposed the use of iterative polarization quantization (IPQ)-based modulation scheme with component codes being large-girth low density parity check (LDPC) codes [3]

  • We further study the use of reduced complexity (RC) decoding algorithm in polarization multiplexed (PolMUX) 32-IPQ with symbol rate of 50 Giga symbols/s (50 GS/s) and show that that net coding gains (NCGs) beyond 11 dB are possible

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Summary

Introduction

In response to high-bandwidth demands due to rapid growth of data-centric applications and deployment of broadband access networks, the network operators are upgrading their dense wavelength division multiplexing (DWDM) networks from 10Gb/s per channel to more spectrally efficient 40 Gb/s and 100 Gb/s [1]. In order to achieve ultra-high-speed optical transmission at 400Gb/s and beyond with commercially available equipment operating at 40 Giga symbols/s (40 GS/s), we have recently proposed the use of iterative polarization quantization (IPQ)-based modulation scheme with component codes being large-girth low density parity check (LDPC) codes [3]. This scheme, requires the implementation of sum-product algorithm (SPA), commonly used in decoding of LDPC codes, at 40 Gb/s, which is challenging to implement even with state-of-the-art electronic integration circuits technology.

Reduced-complexity LDPC decoders
Bit decisions
PolMUX IPQ coded-modulation based on large-girth LDPC codes and RC decoders
Conclusions
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