Abstract
The introduction of SiGe channel pMOSFETs for high mobility devices is expected to enhance the impact ionization phenomenon, making it necessary to study Hot Carrier (HC) degradation also for the p-channel MOSFET reliability. The study of pure HC effects on pMOSFETs is complicated due to the mixing with Negative Bias Temperature Instability (NBTI). In the first part of this work the interaction of the two degradation mechanisms is studied thoroughly on Si devices with the extended measure-stress-measure (eMSM) technique which is capable of capturing both the charge trapping and the interface state creation components of the degradation. HC degradation is shown to enhance interface state creation, while eventually reducing the charge trapping w.r.t. standard NBTI. These experimental results are supported by MEDICI simulations. The second part of the paper focuses on the HC reliability of Si 0.45 Ge 0.55 pMOSFETs. These devices show enhanced degradation w.r.t. their Si counterparts, confirming the importance of studying HC effects for the reliability of this technology. Nevertheless, the SiGe device reliability can be enhanced when reducing the thickness of the Si cap.
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