Abstract

Polymeric transistor degradation was investigated on bottom and top gate structures. Shelf-lifetime studies in both kinds of devices demonstrate an accelerated increase in effective charge carrier mobility, threshold voltage, and off current in modulus when poly(3-hexylthiophene) (P3HT) is exposed to atmospheric gases. Although P3HT is underneath PMMA dielectric and gold gate electrode films, electrical parameters degradation can be only delayed by 100 h. Therefore, only glass encapsulation of the active area is capable of effectively preventing current modulation decrease after exposure to atmospheric gases. Differently from their bottom-gate counterparts, capped top-gate TFTs clearly present negative threshold voltage and positive hysteresis. An interface with reduced deep traps concentration and electrical characterization influence on shallow traps filling are believed to play a significant role in these top-gate P3HT/PMMA transistors under operating conditions. Alternating gate voltage stress along 3000 cycles provides evidence of electrical sweep as a cause of performance degradation. Similarly, dc gate bias stress monitored for 127 min can impair current modulation and shifts threshold voltage depending on its sign. Finally, reversibility of both kinds of stress points that shallow traps are the major problem in these capped devices.

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