Abstract
Experimental data showing the variations of the latchup sensitivity of CMOS integrated circuits in usual e-beam test conditions are reported in the present work. The results have been obtained on a basic cell fabricated in a 2 μm CMOS industrial technology. This paper particularly emphasizes the important role played by two parameters, the incident electron dose and the applied extraction field. The effect of each one has been quantified and dissociated. We show that the incident dose causes a regular degradation in the device sensitivity to this phenomenon whereas the extraction field determines its rate and its extent. As a matter of fact, it is shown that there exists a critical value of this field above which latchup can occur even without any external applied parasitic stimulus. The observations are analyzed and a modeling of the phenomenon is proposed.
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