On the Issue of Crack Formation in a Thin Dielectric Layer on Silicon under Thermal Shock

Abstract

The work is devoted to the problem of crack formation in thin sublayers of silicon oxide during pulsed heating of interconnects on single-crystal silicon wafers. It was shown that the passage of current pulses with an amplitude of up to 8 × 1010 A/m2 and a duration of up to 500 μs leads to thermal destruction of the interconnects and contributes to the formation of microcracks in SiO2 films along the metallization path. The magnitude of the mechanical stresses arising in the structure during thermal shock is estimated. It is shown that in contrast to SiO2 films, the level of mechanical stresses in silicon is insufficient for cracking near the source of thermal shock. It was also found that the nature of cracking in a dielectric film depends on the quality of the deposition of the dielectric film and the metal film, as well as the state of the dielectric-metal interface.