Abstract
This tutorial addresses some fundamental issues of presently available digital signal processing (DSP) micros which have matured within the last decade. The architecture of these devices is a modified version of a general purpose microprocessor tailored to the need for high computation speeds to execute DSP algorithms. This architecture, for most presently available DSP devices, uses extensive pipelining, multiple independent memories, parallel functional units and several innovative techniques to improve overall performance. The applications of these devices are spreading rapidly over a wide range of areas and, using various configurations, meet both non-real-time and real-time requirements. The choice of a DSP micro for a specific application is at present a matter of concern. These are the issues discussed briefly in this paper.
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