On the effect of noise and electronics bandwidth on a stochastic-resonance memory device

Abstract

We recently showed that a ring of two bistable oscillators is capable of storing a single bit of information via stochastic resonance. Memory performance was characterized in terms of the probability of erroneous bit detection and was shown to be minimized for a range of noise intensities. Furthermore, memory persistence was also shown to exhibit a stochastic‐resonance behavior. In this paper we investigate the influence on memory performance, in particular its resilience to noise, on both noise bandwidth and the limited time response of the bistable elements. We show that, for broad ranges of ST and noise bandwidths, the probability of erroneous bit retrieval is also minimized for an optimal noise intensity, exhibiting a deep well as a function of noise intensity. We are interested in the breadth of such a well as it points out to the robustness of the memory device under different working conditions. Moreover, we show that there exists a relation between the noise and ST bandwidths that favors wide wells. We believe that this relation may be of relevance as a design rule for practical memory devices sustained by noise.