Abstract

We present new O(n)-time methods for planar embedding and Kuratowski subgraph isolation that were inspired by the Booth-Lueker PQ-tree implementation of the Lempel-Even-Cederbaum vertex addition method. In this paper, we improve upon our conference proceedings formulation and upon the Shih-Hsu PC-tree, both of which perform comprehensive tests of planarity conditions embedding the edges from a vertex to its descendants in a ‘batch’ vertex addition operation. These tests are simpler than but analogous to the templating scheme of the PQ-tree. Instead, we take the edge to be the fundamental unit of addition to the partial embedding while preserving planarity. This eliminates the batch planarity condition testing in favor of a few localized decisions of a path traversal process, and it exploits the fact that subgraphs can become biconnected by adding a single edge. Our method is presented using only graph constructs, but our definition of external activity, path traversal process and theoretical analysis of correctness can be applied to optimize the PC-tree

Highlights

  • A graph G contains a set V of vertices and a set E of edges, each of which corresponds to a pair of vertices from V

  • Generating a planar drawing is often viewed as a separate problem, in part because drawing algorithms tend to create a planar embedding as a first step and in part because drawing can be application-dependent

  • The lowpoint of a vertex is the DFS ancestor of least depth first indices (DFI) that can be reached by a path of zero or more descendant DFS tree edges plus one back edge, and it can be computed in linear time by a post-order traversal of the depth first search tree [24]

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Summary

Introduction

A graph G contains a set V of vertices and a set E of edges, each of which corresponds to a pair of vertices from V. Due to this constraint, some biconnected components may need to be flipped before they are merged, and Section 4 describes how our method flips a biconnected component in constant time by relaxing the consistency of vertex orientation in the partial embedding. Some biconnected components may need to be flipped before they are merged, and Section 4 describes how our method flips a biconnected component in constant time by relaxing the consistency of vertex orientation in the partial embedding

The Fundamental Operation
External Activity
Flipping in Constant Time
Planar Embedding by Edge Addition
The Walkup
The Walkdown
A More Global View
Linear Time Performance
Proof of Correctness
Kuratowski Subgraph Isolator
Conclusion
C Walkup Pseudo-Code
D Walkdown Pseudo-Code
Full Text
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