Abstract
Detecting and eliminating logic hazards in Boolean circuits is a fundamental problem in logic circuit design. We show that there is no O(3(1−ϵ)npoly(s)) time algorithm, for any ϵ>0, that detects logic hazards in Boolean circuits of size s on n variables under the assumption that the strong exponential time hypothesis is true. This lower bound holds even when the input circuits are restricted to be formulas of depth four. We also present a polynomial time algorithm for detecting 1-hazards in Dnf (or, 0-hazards in Cnf) formulas. Since 0-hazards in Dnf (or, 1-hazards in Cnf) formulas are easy to eliminate, this algorithm can be used to detect whether a given Dnf or Cnf formula has a hazard in practice.
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