Abstract
The use of quadratic permutation polynomials as interleavers for turbo codes is justified, among other things, by the fact that the quadratic permutation polynomials provide turbo codes of very good performance and simultaneously they support a specific conflict-free parallel access to extrinsic values in two different access orders. It is rather easy to write and read in parallel to and from multiple memories by one access order. Nevertheless, turbo decoders have to access the multiple memories at least by two different access orders. Then, parallel writes and reads lead to conflicts in accessing the multiple memories. Having only one conflict-free parallel access method for quadratic permutation polynomials restricts to design efficient flexible (multistandard) decoders for turbo codes at high data rates. We show that quadratic permutation polynomials with butterfly networks as interconnection networks between decoder units and memories support many kinds of flexible and variant conflict-free parallel access methods for turbo codes that are not known today. This result extends possibilities to implement high speed turbo decoders not only by application specific circuits but also by (general purpose) graphics processor units for (multistandard) modems.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.