Abstract
On Optimization of Manufacturing of a CMOS Power Amplifier to Increase Density of Elements with Account Miss-Match Induced Stress and Porosity of Materials
Highlights
In this paper we introduce an approach to manufacture field-effect heterotransistors framework a CMOS power amplifier [20] to decrease their dimensions with increasing their density
To solve the aims we consider a heterostructure, which consist of a substrate and an epitaxial layer
The epitaxial layer includes into itself several sections, which were manufactured by using other materials
Summary
In the present time several actual problems of the solid state electronics (such as increasing of performance, reliability and density of elements of integrated circuits: diodes, field-effect and bipolar transistors) are intensively solving [1-6]. One way to decrease dimensions of elements of integrated circuits is manufacturing them in thin film heterostructures [3-5,11]. In this case it is possible to use inhomogeneity of heterostructure and necessary optimization of doping of electronic materials [12] and development of epitaxial technology to improve these materials (including analysis of mismatch induced stress) [14-16]. To solve the aims we consider a heterostructure, which consist of a substrate and an epitaxial layer (see Fig. 1). Diffusion or ion implantation to manufacture the required types of conductivity (p or n) These areas became sources, drains and gates (see Fig. 1). After this doping it is required optimized annealing of dopant and/or radiation defects
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