On Methodology for the Verification of Reconfigurable Timed Net Condition/Event Systems

Abstract

This paper deals with the formal verification of reconfigurable discrete event control systems (RDECSs) using reconfigurable timed net condition/event systems (R-TNCESs) formalism. A reconfigurable system switches from a mode to another during its working process to adapt its behavior to the related environment. By including such a feature, RDECSs become complex and their verification is often expensive in terms of computation time and memory. In this paper, a new methodology for formal verification of RDECSs is proposed in order to ensure the correctness of these systems with a reduced cost (decreasing the verification time and memory occupation). The proposed contribution includes an improved modeling and verification of RDECSs. The modeling with R-TNCESs is enriched with all reconfiguration forms, and the verification involves an improvement method that avoids any redundancy and cancels unnecessary calculations. In addition, a visual tool called Rec-AG based on the proposed methodology is developed. The performance evaluation of this paper is achieved by measuring computation time and memory for several systems and different sizes of the problem. This paper’s contribution is applied to the benchmark production system FESTO.