On Fault-Ride-Through Performance in MMC-HVDC Applications Controlled as a Virtual Synchronous Machine

Abstract

Due to decreasing inertia within the German transmission grid, HVdc transmission links are recently planned as a grid-forming asset in order to contribute to the overall system stability. Here, virtual synchronous machine implementations may be favoured as they enable inertia supply and operation at different grid strengths. However, their fault-ride-through capability is linked to several challenges such as current limitation, the preservation of transient stability and dynamic reactive current injection, especially, while providing high inertia. Moreover, diverse effects occur at the point of connection, such as voltage drop and phase jump effects, which can be traced back to the fault impedance characteristic during a symmetrical fault event and affect the transient stability. Therefore, this article investigates these occurring effects in detail. Based on this analysis, the performance of the virtual synchronous machine is evaluated with respect to different design aspects - namely the reactive power control, the inertia model and design of the phase locked loop - resulting in a recommendation for a design compromise. Finally, observed relations are classified according to their applicability within a typical design of an HVdc converter equipped with half-bridge submodules. Derived design recommendations are validated by simulations in electromagnetic transients software.