Abstract
The equivalent circuit model of a submillimeter planar diode is investigated. In particular, the parasitic finger to pad capacitance that shunts the diode junction severely degrades the performance of frequency multiplier. Therefore, precise estimation of its value is crucial to circuit design in the submillimeter wave range. In this letter, a parallel diode structure is analyzed, and symmetry is utilized to remove parasitic elements external to the finger loop. This analytical approach is verified through measurement on a 200 GHz planar diode circuit. To increase the diode junction capacitance modulation ratio, one possible solution is also suggested.
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