Abstract

The authors report on an efficient fault simulation method for synchronous sequential circuits. The method is based on concurrent fault simulation and has the simplicity of deductive fault simulation. Several new ideas to reduce computation time and memory requirements are proposed. New fault simulators were developed to simulate transition faults as well as stuck-at faults. The experimental results demonstrate that the proposed method is effective for simulating faults in large synchronous sequential circuits in the workstation environment. >

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.