On Complexity of Internal and External Equivalence Checking

Abstract

We compare the complexity of and equivalence checking. The former is meant for proving the correctness of a synthesis transformation by which circuit N2 is obtained from circuit N1. The latter is meant for proving that circuits N1 and N2 are functionally equivalent without making any explicit assumptions about the origin of N1 and N2. We describe logic synthesis procedures that can produce a circuit N2 whose equivalence with the original circuit N1, most likely, can not be efficiently proved by an external equivalence checker. On the other hand, there are internal equivalence checking procedures that easily prove that N1 and N2 are equivalent. We give experimental data showing that these logic synthesis procedures are not a mathematical curiosity but indeed can be used as a powerful method of logic optimization.