On-Chip Supply Noise Regulation Using a Low-Power Digital Switched Decoupling Capacitor Circuit

Abstract

On-chip resonant supply noise in the mid-frequency range (i.e., 50-300 MHz) has been identified as the dominant supply noise component in modern microprocessors. To overcome the limited efficiency of conventional decoupling capacitors in reducing the resonant supply noise, this paper proposes a low-power digital switched decoupling capacitor circuit. By adaptively switching the connectivity of decaps according to the measured supply noise, the amount of charge provided by the decaps is dramatically boosted leading to an increased damping of the on-chip supply network. Analysis on the charge transfer during the switching events shows a 6-13X boost of effective decap value. Simulations verify the enhanced noise decoupling performance as well as the effective suppression of the first-droop noise. A 0.13 mum test chip including an on-chip resonance generation circuit and on-chip supply noise sensors was built to demonstrate the proposed switched decap circuit. Measurements confirm an 11X boost in effective decap value and a 9.8 dB suppression in supply noise using the proposed circuit. Compared with previous analog techniques, the proposed digital implementation achieves a 91% reduction in quiescent power consumption with improved tolerance to process-voltage-temperature (PVT) variation and tuning capability for obtaining the optimal switching threshold.