On-Chip Power Supply Noise Suppression Through Hyperabrupt Junction Varactors

Abstract

The increasing power density and, therefore, current consumption of high-performance integrated circuits (ICs) results in increased challenges in the design of a reliable and efficient on-chip power delivery network. In particular, meeting the stringent on-chip impedance of the IC requires circuit and system techniques to mitigate the high-frequency noise that results due to resonance between the package inductance and the on-chip capacitance. A novel circuit technique is proposed to suppress high-frequency noise through the use of a hyperabrupt junction tuning varactor diode as a decoupling capacitor (decap) for noise critical functional blocks. With the proposed circuit technique, the voltage droops and overshoots on the on-chip power distribution network are suppressed by up to 60% as compared with MIM or deep trench decaps of the same capacitance. In addition, there is no added latency to react to power supply noise, and there is no degradation to circuit performance as compared with existing techniques in commercial products and literature.