On-chip Generation of Functional Tests with Reduced Delay and Power

Hemanth Kumar Motamarri,B Leela Kumari

doi:10.11591/eei.v6i1.570

Abstract

This paper describes different methods on-chip test generation method for functional tests. The hardware was based on application of primary input sequences in order to allow the circuit to produce reachable states. Random primary input sequences were modeled to avoid repeated synchronization and thus yields varied sets of reachable states by implementing a decoder in between circuit and LFSR. The on-chip generation of functional tests require simple hardware and achieved high transition fault coverage for testable circuits. Further, power and delay can be reduced by using Bit Swapping LFSR (BS-LFSR). This technique yields less number of transitions for all pattern generation. Bit-swapping (BS) technique is less complex and more reliable to hardware miscommunications.

Highlights

Testing of a circuit becomes complex when it is tested in non functional mode.Detection of faults during non functional mode can be termed as over testing which is not desirable
If an arbitrary state is used as scan-in state, a pattern test can bring the circuit under test through state transitions which can’t occur during functional operations
In non functional mode as current requirement is higher than the current required in functional operation may cause voltage drops which may slow down the speed of the circuit and may fail

Summary

Introduction

Testing of a circuit becomes complex when it is tested in non functional mode. Detection of faults during non functional mode can be termed as over testing which is not desirable. On considering the above example the minimum length of the LFSR here should be (3.4), where 3 > mod(2) and length of primary input sequence is 4.This is the minimum length required for an LFSR to produce the tests in order to avoid synchronization problems as dependencies of the patterns on the shifted values of the preceding ones. The unused values in (d.n) length of the LFSR are used to avoid the synchronization problems Due to this it is possible to produce many reachable states using the primary input sequence H. In addition to this other parts of hardware used for test generation can be simplified with the design, as discussed below. Synchronization problem can’t be avoided completely. 5) It cannot determine the state of the design too

Modulo LFSR

Experimental Results Operating Conditions

Results