On-chip evaluation, compensation and storage of scan diagnosis data

Abstract

Technology and product ramp-up suffers increasingly from systematic production defects. Diagnosis of scan-test fail data plays an important role in yield enhancement, as diagnosis of scan fail data helps to understand and overcome systematic production defects. Acquisition of scan fail data during high-volume production may lead to significant test time overhead. A new on-chip architecture is presented that evaluates scan-test results and stores relevant scan diagnostic information on chip. Scan diagnostic data is unloaded for offline analysis after the scan test has been finished. Unloading scan diagnostic data from chip requires only very little test time overhead. Moreover, the proposed technique is automatic test equipment independent and accelerates test program development. A detailed implementation example, based on a state-of-the-art SoC device, is given.