Abstract
Massively parallel reconfigurable architectures, which offer massive parallelism coupled with the capability of undergoing run-time reconfiguration, are gaining attention in order to meet the increased computational demands of high-performance embedded systems. We propose that the occam-pi language is used for programming of the category of massively parallel reconfigurable architectures. The salient properties of the occam-pi language are explicit concurrency with built-in mechanisms for interprocessor communication, provision for expressing dynamic parallelism, support for the expression of dynamic reconfigurations, and placement attributes. To evaluate the programming approach, a compiler framework was extended to support the language extensions in the occam-pi language and a backend was developed to target the Ambric array of processors. We present two case-studies; DCT implementation exploiting the reconfigurability feature of occam-pi and a significantly large autofocus criterion calculation based on the dynamic parallelism capability of the occam-pi language. The results of the implemented case studies suggest that the occam-pi-language-based approach simplifies the development of applications employing run-time reconfigurable devices without compromising the performance benefits.
Highlights
Introduction and MotivationThe computational requirements of high-performance embedded applications, such as video processing in HDTV, baseband processing in telecommunication systems, and radar signal processing, have reached a level where they cannot be met with traditional computing systems based on general-purpose digital signal processors
We have introduced new grammar rules corresponding to these additional constructs to create Abstract Syntax Trees (AST) from tokens generated at the lexical analysis stage
The Streaming RISC processors with DSP extensions (SRD) processor takes 2 cycles to write one memory word in its local memory, the memory writing time is a significant part of the overall reconfiguration time
Summary
Introduction and MotivationThe computational requirements of high-performance embedded applications, such as video processing in HDTV, baseband processing in telecommunication systems, and radar signal processing, have reached a level where they cannot be met with traditional computing systems based on general-purpose digital signal processors. The procedural models of high-level programming languages, such as C, rely on sequential control flow, procedures, and recursion, which are difficult to adapt for reconfigurable arrays The focus of these sequential languages is to provide abstractions for algorithm specification, but the abstractions, intentionally, do not say much about how they are mapped to underlying hardware. The development challenges include the need to learn multiple low-level languages, the requirement of partitioning and decomposing the application into several independent subtasks that can execute concurrently, and the need for expressing reconfigurations in order to cope with the adaptability requirements All these challenges need to be taken care of by using an appropriate programming model
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