Abstract
The voltage limitations of UMOS vs VDMOS field-effect power transistor structures have been compared using 2-dimensional, 2-carrier numerical simulation for these devices in which the channel doping varies from source to drain. The electric field distribution at the surface and in the bulk is compared for these two structures. Premature voltage breakdown is predicted for the UMOS device caused by impact ionization due to the high electric field near the Si/SiO 2 interface.
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