Numerical de-embedding procedure and unified circuit model for planar integrated circuits

Abstract

In this work, a numerical de-embedding procedure, called `short-open calibration' (SOC), is originated and proposed for accurate parametric extraction of planar integrated circuits. This SOC technique is developed by defining two numerical calibration standards, namely, short and open elements, which allow to extract equivalent circuit parameters from a full-wave method of moments (MoM) in a deterministic format. With this scheme implemented in the MoM algorithm, planar integrated circuits and discontinuities can be accurately characterized in terms of their respective unified circuit models, which can account for effects of frequency dispersion, high-order modes and radiation losses. The SOC-extracted circuit parameters for several selected examples are obtained in this paper to exhibit some distinct quasi-lumped circuit behavior of those planar structures over low-frequency range. The unified circuit model is very useful for the optimized design of electrically large planar circuits by using well-established efficient tools based on analytical network synthesis or optimization. Two planar band-pass filters are thus designed with cascaded circuit topologies and simulated electrical characteristics are well confirmed by our measurements.