Abstract

Aligned GaN nanowire arrays have high potentials for applications in future electronic and optoelectronic devices. In this study, the growth of GaN nanowire arrays with high degree of vertical alignment was attempted by plasma-enhanced CVD on the c-plane GaN substrate. We found that the lattice matching between the substrate and the nanowire is essential for the growth of vertically aligned GaN nanowires. In addition, the initial nucleation process is also found to play a key role in creating the high-quality homoepitaxy at the nanowire-substrate interface. By controlling the nucleation stage, the growth of highly aligned vertical GaN nanowire arrays can be achieved. The reasons for the observed effects are discussed.

Highlights

  • Aligned nanowires are potentially useful for the fabrication of nanowire electronic and optoelectronic devices

  • A route to highly vertically aligned GaN nanowires on the c-plane GaN substrate is reported in this study

  • We have shown that the degree of vertical alignment can be improved via controlling the gallium partial pressure during the nucleation of nanowires on the substrate

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Summary

Introduction

Aligned nanowires are potentially useful for the fabrication of nanowire electronic and optoelectronic devices. Both the growth direction and the crystallographic orientation of nanowires have significant effects on the efficiency, performance, and manufacturability of nanowire devices [1]. Compared to randomly oriented nanowires, vertically aligned nanowires have several advantages including the ability to control the crystallographic orientations of nanowires and the ability to manufacture electronic and optoelectronic devices [3]. For the vertically aligned nanowires, the uniformity of nanowire height and diameter can be more likely achieved due to the uniform mass and heat transport to each nanowire and the absence of collision and coalescence between two nanowires during the growth [4]. The devices can be fabricated on the nanowire arrays with vertical alignment using the vertical electrical integration scheme, in which the efficiencies of

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