NTL with complementary emitter-follower driver: a high-speed low-power push-pull logic circuit

Abstract

A high-speed low-power nonthreshold-logic (NTL)-based push-pull logic circuit, featuring a complementary emitter-follower driver is presented. Compared with the standard NTL circuit, the circuit offers a much better balance between the pull-up and pull-down delay, improved scalability, and superior load driving capability. Simulation results based on a 0.8- mu m double-poly. self-aligned complementary bipolar technology indicate that at a power consumption of 1.22 mW/gate, the circuit offers 2.4* improvement in the pull-down delay of a loaded gate and 4.0* improvement in the load driving capability over the standard NTL circuit. The design and scaling considerations of the circuit are discussed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>